Could anyone provide any suggestions to fix this deadlock?
This is the probe configuration:
— visionfive2.cfg -----------------------
SPDX-License-Identifier: GPL-2.0-or-later
adapter speed 4000
source [find interface/ftdi/flyswatter2.cfg]
reset_config trst_only
set _CHIPNAME riscv
jtag newtap s76 cpu -irlen 5 -expected-id 0x07110cfd
jtag newtap u74 cpu -irlen 5 -expected-id 0x07110cfd
target create s76.cpu0 riscv -chain-position s76.cpu -coreid 0 -rtos hwthread
target create u74.cpu1 riscv -chain-position u74.cpu -coreid 1
target create u74.cpu2 riscv -chain-position u74.cpu -coreid 2
target create u74.cpu3 riscv -chain-position u74.cpu -coreid 3
target create u74.cpu4 riscv -chain-position u74.cpu -coreid 4
target smp s76.cpu0 u74.cpu1 u74.cpu2 u74.cpu3 u74.cpu4
init
This is the openocd session log:
SHELL> /opt/riscv-openocd/bin/riscvopenocd -f board/visionfive2.cfg
Open On-Chip Debugger 0.12.0+dev-02944-ga45589d60 (2023-08-09-17:21)
Licensed under GNU GPL v2
For bug reports, read
OpenOCD: Bug Reporting
Info : auto-selecting first available session transport “jtag”. To override use ‘transport select ’.
Info : clock speed 4000 kHz
Info : JTAG tap: s76.cpu tap/device found: 0x07110cfd (mfg: 0x67e (Guangdong StarFive Technology Co), part: 0x7110, ver: 0x0)
Info : JTAG tap: u74.cpu tap/device found: 0x07110cfd (mfg: 0x67e (Guangdong StarFive Technology Co), part: 0x7110, ver: 0x0)
Info : [u74.cpu1] datacount=2 progbufsize=16
Info : Disabling abstract command reads from CSRs.
Info : Disabling abstract command writes to CSRs.
Info : [u74.cpu1] Examined RISC-V core; found 5 harts
Info : [u74.cpu1] XLEN=64, misa=0x800000000094112f
[u74.cpu1] Target successfully examined.
Info : [u74.cpu2] datacount=2 progbufsize=16
Info : Disabling abstract command reads from CSRs.
Info : Disabling abstract command writes to CSRs.
Info : [u74.cpu2] Examined RISC-V core; found 5 harts
Info : [u74.cpu2] XLEN=64, misa=0x800000000094112f
[u74.cpu2] Target successfully examined.
Info : [u74.cpu3] datacount=2 progbufsize=16
Info : Disabling abstract command reads from CSRs.
Info : Disabling abstract command writes to CSRs.
Info : [u74.cpu3] Examined RISC-V core; found 5 harts
Info : [u74.cpu3] XLEN=64, misa=0x800000000094112f
[u74.cpu3] Target successfully examined.
Info : [u74.cpu4] datacount=2 progbufsize=16
Info : Disabling abstract command reads from CSRs.
Info : Disabling abstract command writes to CSRs.
Info : [u74.cpu4] Examined RISC-V core; found 5 harts
Info : [u74.cpu4] XLEN=64, misa=0x800000000094112f
[u74.cpu4] Target successfully examined.
Info : starting gdb server for u74.cpu1 on 3333
Info : Listening on port 3333 for gdb connections
Info : starting gdb server for u74.cpu2 on 3334
Info : Listening on port 3334 for gdb connections
Info : starting gdb server for u74.cpu3 on 3335
Info : Listening on port 3335 for gdb connections
Info : starting gdb server for u74.cpu4 on 3336
Info : Listening on port 3336 for gdb connections
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting ‘gdb’ connection on tcp/3333
Info : New GDB Connection: 1, Target u74.cpu1, state: halted
At this point it is not possible to proceed with the debug session from the vscode console.
While everything works fine using qemu emulation:
qemu-system-riscv64 -nographic -machine virt -m 2048M -D ./log/log.txt -gdb tcp::1234 -S -kernel build/blinky_demo.elf
Many Thanks.