Is there GPU documentation for the Visionfive 2?

Where could I get the documentation for the GPU in the VF2 as a hobbyist?

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You are not SiFive’s market. Sorry. They don’t like hobbyists (or anyone else) sharing their doc.

They document cores, but not really chips at Documentation. They make cores and not chips. So this lands more on StarFive.

The Display subsystem gets some attention at JH-7110 and that’s been enough to let people bring up text mode. Some doc appeared at starfive-tech · GitHub a while back (that might have been for 7100) and was removed, but it’s still another source of doc.

If you’re looking for the “how do I find the doc to write my own X server that actually works with common monitors and runs Doom at 400fps” doc, that one seems to be rather hard to find. :slight_smile: Imagination’s release schedule has been hard to understand. They inserted themselves into the process of writing drivers - by not releasing doc - but don’t seem to be in a particular hurry to actually release the driver.

TL;DR: the doc you probably REALLY want doesn’t seem to exist. Someone recently wrote drivers for Nuttx, but I doubt it was fully reverse engineered 3D.

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Yeah I mean if you are going to tout RV64GC chips as open source CPUs these companies should follow suit. I like RISC-V and SiFive should live up to their brand. Also to imagination I have one thing to say: chop chop. Either dump your magic docs so that we the users can write drivers or hurry up with your mesa work.

I agree it’s weird that IMG seemed to wait until after the chip was released to even start work on a driver. “But it’ll be great when it exists.” Ummm Hmmm.

But recalibrate your expectations a bit on the former. Nobody promised the JH-7110 was open source. The JH-7110 is a combination of licensed tech like the Cadence coreware used for serial and USB and the SiFive cores and the Imagination graphics and several other IP blocks. That’s all licensed and closed. There’s a lot of additional IP on 7110 that’s closed. The ISA is open to use and it’s open to participate in the governing, but it’s not like the 7110 - or most other non-trivial chips - are even vaguely open.

“But C906 and C910!” someone is preparing to flame right now. Yep, and it’s said that even with the “source” on GitHub that you still have to contract T-Head for help to actually get it onto a wafer in a reasonable time in a way that’s possible to actually manufacture. There’s still way more to a SoC than the CPU core and much of THAT is licensed, so it’s not like D1 or TH-1520 are “open”, either, though parts of their core is.

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I just think that the hype around risc v is too trumped up and the actual product is neat for a hobbyist but nowhere near as open as people claim it is. We need an open Risc-V core that is it’s own chip.

Sure. Lots of people don’t understand the hype, including a large percentage of the people creating it.

There are many many open source cores on GitHub today that are capable of booting and running appropriate “adult” OSes like Linux and FreeBSD. You can run those in an emulator or on an FPGA today. (Follow @logickian on twitter for examples.) Every semester, we produce another generation of grads that have successfully built cores, OSes, compilers, and everything else involved. The process of getting from there to actual chips is well understood: just apply money.

LibreSOC tried to do what you’re suggesting. I’ll let you study the history on that one - including the history of the one they somehow entrusted the money to - and make your own decisions on how likely you are to ever hold a LibreSOC phone. :smiley:

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No. What I really think for the real world is that a company should make a limited subset of their IP blocks source available under a limited license that would allow end users to understand and modify the designs while prohibiting businesses from using it commercially.

Some groups do that. Others don’t. If you just want blocks for study, GitHub and various universities have huge lists of [most of] them.

What does it even mean to modify those blocks? OK, you somehow scored the Cadence UART source and you found and fixed [ a bug in the errata ]. It’s not like you can patch < uart_fix.diff > /dev/cpu and get a chip that doesn’t require workarounds to not crash. See, “open source” in a chip just doesn’t mean the same thing as it does in software or even a hardware design. (Lots of PCB makers publish the schematics, gerbers, and other data needed to replicate their designs - that’s also awesome to study.)

You might not be able to get the source code for the exact Cadence UART that’s in JH-7110, but it’s not like open source UARTs are a rarity if you wanted to use another. GPIO, I2C, I2S, etc. are all commonly open source. Audio is difficult to navigate around license issues at the high end, but a basic player is possible. MOST of the blocks you need for a viable SOC have versions that are open enough. High speed RAM (like SRAM for caches and DDR4/DDR5 controllers, so you can interface with RAMs you can buy) tends to be pretty locked down. Building a VGA-level video controller is pretty easy, but cloning even a GTX-1080 is not.

So if you really are looking for blocks to learn from, there are rich choices. You can synthesize them onto a $50 FPGA and have a system that’ll boot and run your favorite OS at dozens of Mhz and learn plenty in the process.

The difference between a $50 qty FPGA and a $3 SOC at a Ghz is probably about $15-20M. Price lists for these things can be found if you really want to run with it.

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Hi there, you can find some GPU documentation here:

I mean like how can I fake being a corporation on Imagination’s website