JH7100 has a E24 monitor core. Per the Boot User Guide: JH7100_Docs/JH7100 SoC Boot User Guide-V01(2021-6-7).pdf at main · starfive-tech/JH7100_Docs · GitHub there is a way to properly reset and initialize it to run rv32 code. However discussion here: Re: [PATCH v1 2/2] riscv: dts: starfive: add the missing monitor core - Icenowy Zheng seems to suggest we never used it and just let it sit there doing nothing after Linux boots up. Does starfive provide any guide on how to make proper use of it?
I just asked starfive the same question about E24 on JH7110 (visionfive 2). They’ve told me that the linux kernel driver that initialize E24 from the U74-MC side is not yet ready to be open sourced. Thus, the closest you’ll get is from: soft_3rdpart/e24 at JH7110_VisionFive2_devel · starfive-tech/soft_3rdpart · GitHub
Also there’re some configuration registers you may found from the JH7110 TRM: https://doc-en.rvspace.org/JH7110/PDF/JH7110_TRM_StarFive_Preliminary_V2.pdf
I’ll wait for starfive’s update.
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I think I found the answer myself. E24 reset vector can be programmed through u0_e2_sft7110_reset_vector_0 in STG SYSCON. Clock and reset can be triggered through JH7110_E2_RTC_CLK/JH7110_E2_CLK_CORE/JH7110_E2_CLK_DBG and RSTN_U0_E24_CORE. They are all specified in device-tree. TRM also indicates how interrupts are routed to E24. You can probably build a rv32 binary, put it in some physical address below 4G (or use E24 address remapping), set the reset vector to it and deassert the reset signal. It might just start to run.
Overall, you can try to make it work, however I think it’s too cumbersome without starfive releasing the source code or even binary of the kernel module e24.ko. S7 might be a better choice to run your management agent. It’s well documented. The only problem is that it doesn’t have S mode, so my advice is to run M Mode Linux with NO_MMU on S7 core, or some other RTOS.
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