Pinctrl registers

I’m trying to setup gpio, but I cannot find the pinctrl registers in any of the documentation.
This would not be part of the SiFive supplied documentation,
I expect it is specific to startfive.
Is there a document we can have which gives details all of the gpio registers such as the pinctrl.

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JH7110 technical documentation is unfortunately still “coming soon”.

Your best bet right now would be to look at the u-boot or Linux patches.

Thanks Im doing that, but there is s much of it.

For anybody else with the same query
In the u-boot source code:

./include/dt-bindings/clock/starfive-jh7110-clkgen.h
./include/dt-bindings/clock/starfive-jh7110-vout.h
./include/dt-bindings/clock/starfive-jh7110-isp.h
./include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h
./include/dt-bindings/reset/starfive-jh7110.h
./arch/riscv/include/asm/arch-jh7110/jh7110-regs.h
./arch/riscv/include/asm/arch-jh7110/eeprom.h
./arch/riscv/include/asm/arch-jh7110/clk.h
./arch/riscv/include/asm/arch-jh7110/gpio.h
./arch/riscv/include/asm/arch-jh7110/spl.h

In my case I wanted the uart0 and this looks to be the code
/uart0 tx/
SYS_IOMUX_DOEN(5, LOW);
SYS_IOMUX_DOUT(5, 20);
/uart0 rx/
SYS_IOMUX_DOEN(6, HIGH);
SYS_IOMUX_DIN(6, 14);

#define GPOUT_SYS_UART0_TX 20
#define GPI_SYS_UART0_RX 14

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Hi,
I was looking for the jh7100 (previous chip) technical document for memory map and device register details.

As I expected it to be similar,
but it appears such a document was never released.

Please can you give us an idea of when the jh7110 technical document will be released.
Is it weeks, 3 months or years away ?

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Somewhat related to this: I’m in awe of all the displays you can get for Raspberry Pi (see eg waveshare.com) but they depend on being able to route the video signals through the 40
GPIO connector as well as deep control over the video. Will we ever be able to do the same on the VisionFive 2?